about us

Agile Analog, creators of a better way to buy analog IP.

Until now, buyers of analog IP have had to settle for the least bad option from a limited portfolio of standard IP products.

Agile Analog is the company behind a new approach: to give the designers of ASICs and SoCs the analog IP that they really want. And to enable this new approach, we developed unique COMPOSA™ methodology for the generation of customer-specified IP fresh for every new chip design.

Every analog circuit is different

In the digital domain, standard IP can be made to implement fixed functions and to perform as specified in any application. And digital IP readily scales from one node to another. 

But standard analog IP is far less useful to chip designers than standard digital IP is, because of the fundamental characteristics of analog systems. In a sensor, for instance, the requirements in relation to parameters such as sensitivity, accuracy, precision, linearity, and stability over temperature differ from application to application. And the behaviour of analog circuits varies substantially from one process and node to another. An IP which is perfect for one application when fabricated in one foundry on one process and node.

So an analog IP supplier could claim to supply, for instance, an ADC as a standard IP ‘product’, but in reality, every single customer wants ADC which is unique to them. A design services consultancy can supply hand-crafted, custom IP, but the process of creating custom IP is slow and very expensive. 

ASIC and SoC designers clearly need another approach. That’s what Agile Analog provides. 

A team with IP heritage

Agile Analog is the creation of a team of analog engineers, chip designers and semiconductor industry executives who draw on decades of experience in the semiconductor IP industry. There, they played important roles in developing a successful market for digital IP. 

The analog IP market today is far smaller and less developed. Yet chip manufacturers and OEMs continually strive to shorten design cycles and integrate ever more functions on-chip – factors which should create surging demand for more analog IP. 

But the market has been failing its customers, because there is too little IP available, and the IP is in a standard, off-the-shelf format. Agile Analog set out to find a way to generate application-specific IP, but without the cost and delay associated with hand-crafted custom IP. Its solution is the COMPOSA™ methodology platform. 

Solving the design automation conundrum

With its COMPOSA™ methodology, Agile Analog has solved the problem of automating the design of analog circuitry – an achievement which had eluded the semiconductor industry for decades. 

COMPOSA™ is a platform methodology for generating unique IP variants on the basis of standard platforms in functional domains such as signal conditioning, data conversion, power regulation and sensing. The COMPOSA™ methodology draws on breakthroughs in design automation, design simulation and the application of artificial intelligence. 

Compatible with the process development kits of all the world’s important CMOS foundries, the COMPOSA™ methodology provides a proven, verified platform for the generation of unique IP on the basis of a broad array of functional specifications, design constraints and optimisation options selected by each customer and for each new design. 

So now with Agile Analog, ASIC and SoC designers can specify and buy analog IP the way they want it. 

Leadership Team

Mike Hulse
CTO
Biography
Barnaby Rix
CFO
Biography
Robert McCubbin
VP Engineering

Biography

Board of Directors

Pete Hutton
Executive Chairman
Biography
Mark Redford
Non-Executive Director
Biography
Jonathan Hay
Non-Executive Director
Biography
Sir Hossein Yassaie
Non-Executive Director

Biography
Henry Gladwyn
Non-Executive Director

Biography
Camilla Mazzolini
Board Observer

Biography
Mina Samaan
Board Observer

Biography
Solving the design automation conundrum.

With its COMPOSA™ technology, Agile Analog has solved the problem of automating the design of analog circuitry – an achievement which had eluded the semiconductor industry for decades.

COMPOSA™ is a platform technology for generating unique IP variants on the basis of standard platforms in functional domains such as signal conditioning, data conversion, power regulation and sensing. The COMPOSA™ technology draws on breakthroughs in design automation, design simulation and the application of artificial intelligence.

Compatible with the process development kits of all the world’s important CMOS foundries, the COMPOSA™ technology provides a proven, verified platform for the generation of unique IP on the basis of a broad array of functional specifications, design constraints and optimization options selected by each customer and for each new design.

So now, with Agile Analog, ASIC and SoC designers can specify and buy analog IP the way they want it.

Analog IP that works the way you
want.

Conventional off-the-shelf analog IP products typically snarl up the IC development process because of the re-work required to make them fit the application. Not Agile Analog IP: it’s the stuff analog engineers’ dreams are made of.

Analog IP that is optimised for your
application.

Unlike standard off-the-shelf IP products, every Agile Analog IP is made fresh for each customer, with the features and specifications the application needs. 

Analog IP that's optimized for your processes and nodes.

The COMPOSA™ technology which generates Agile Analog IP embeds the CMOS design rules set by every important foundry. So you can be sure that the IP which Agile Analog supplies to you is optimised for your foundry, process and node.

Analog IP that integrates the features
you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
tim ramsdale, ceo

Before joining Agile Analog as CEO, Tim served as General Manager, Imaging and Vision at Arm. Prior roles include VP Engineering for Multimedia Products at Arm, and VP Engineering at Broadcom, where he ran teams of up to 750 engineers over 14 sites, developing highly integrated mixed signal SoCs and application processors.

Link to Tim Ramsdale's LinkedIn profile
MIKE HULSE, CTO

Mike has worked in the semiconductor industry for 30 years in a broad range of technical, entrepreneurial, managerial and advisory roles, covering both digital and mixed signal, design methodology, technical leadership and project management.

Link to Tim Hulse's LinkedIn profile
John Hartley, cco

John brings over 28 years of global sales and business development experience to Agile Analog. He has held senior roles in Europe, Asia and the Americas at companies including Microchip, Tundra Semiconductor (now IDT), and PLX (now Broadcom). Most recently, John was Vice President, Global Sales at UltraSoC, a provider of Verilog IP for SoC design. 

Link to John Hartley LinkedIn profile
Barnaby Rix, cfo

Barnaby joined from Arm where he was VP Finance for the Product Groups, running the planning function, managing a P&L of $1.6bn, and a team of 70 people. Prior to this, his roles included VP Treasury at Arm, and as an auditor at Deloitte and at Andersen.

Link to Barnaby Rix's LinkedIn profile
robert mccubbin, vp engineering

Robert has held engineering and technical leadership roles as Director and Senior Director levels at CSR, Qualcomm, Arm and most recently at Cambridge Consultants leading the ASIC activities. Working in both consumer and automotive ICs in Bluetooth, ATM, NB-IoT, audio and ultra-low power edge-AI and IoT applications, he has managed the development and tapeouts of 100s of successful ICs, some of which have shipped in their billions.

Link to Barnaby Rix's LinkedIn profile
paul gibson,vp worldwide sales

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Paul has held GM, VP, and Director of Sales roles during his 35 years in the EDA and IP sectors. Paul has defined and introduced products and services to some of the world’s biggest electronics companies, making several the de facto standard.

Link to Paul Gibson's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
pete hutton, chairman

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Pete has held several senior positions within the industry, most recently as President of Product Groups at Arm, which involved P&L ownership of all product development, marketing and licensing. Prior to this, his roles included running corporate engineering for Wolfson, General Manager for Processors at ARC, and Group Director for Cadence.

Link to Paul Gibson's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
mark redford, non-executive director

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse varius enim in eros elementum tristique. Duis cursus, mi quis viverra ornare, eros dolor interdum nulla, ut commodo diam libero vitae erat.

Mark has held roles as VP Emerging Technologies at Arm, GM of North American Operations & VP of Advanced Technology at CSR and BOD positions at GSS, Surecore and Spin Memory. Alongside his role at Agile, he is currently VP of Silicon Operations at Palma Ceia Semi Design.Mark holds a PhD in Engineering and an Honours Degree in Electronics from the Universities of Edinburgh and Dundee respectively.

Link to Mark Redford's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
jonathan hay, non-executive director

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse varius enim in eros elementum tristique. Duis cursus, mi quis viverra ornare, eros dolor interdum nulla, ut commodo diam libero vitae erat.

Jonathan is a Partner at Delin Ventures where he is responsible for investments into early-stage technology and life sciences businesses and funds.  In addition to Agile Analog, he has led Delin’s investments in Fluidic Analytics, Turbine and Ori Biotech.  Jonathan holds a PhD in mathematics from the Steklov Mathematical Institute, a JD from Harvard Law School, MA from Oxford University and BA from Williams College.

Link to Jonathan Hay's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
Henry Gladwyn, non-executive director

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse varius enim in eros elementum tristique. Duis cursus, mi quis viverra ornare, eros dolor interdum nulla, ut commodo diam libero vitae erat.

Henry Gladwyn is a Partner at OMERS Ventures, located in our London office and focused on early stage tech businesses. Prior to joining OMERS Ventures, Henry was an investor at BGF Ventures where he led several Series A & B investments including the Cybersecurity startup, Garrison Technology, and the biometric identity platform, AimBrain. Before BGF Ventures, Henry was a Lawyer at Slaughter and May. Henry holds a History degree from Christ’s College, a constituent college of the University of Cambridge and a Graduate Diploma in Law (GDL) from BBP University.

Link to Sir Hossein Yassaie LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
sir hossein yassaie, non-executive director

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse varius enim in eros elementum tristique. Duis cursus, mi quis viverra ornare, eros dolor interdum nulla, ut commodo diam libero vitae erat.

A well-recognised figure in the technology world, Sir Hossein Yassaie is also an entrepreneur with a strong belief in technological innovation and disruptions that can solve real problems, disrupt markets and improve everyday life. During his career, Sir Hossein Yassaie has made several contributions that led to industry-changing advances in key technologies including digital TV and radio, PC and games consoles, automotive, computing and, most notably, mobile devices and smartphones. He was founder and CEO of Imagination Technologies Plc until 2016, where he created a semiconductor IP business powering billions of devices. He was also behind the iconic consumer brand Pure. He now has a number of non-executive roles, chairmanships, directorships and investments in numerous disruptive global tech companies.

Link to Sir Hossein Yassaie LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
Camilla Mazzolini, Board observer

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Camilla is a Principal at firstminute capital, $240m AUM seed fund backed by +100 unicorn founders. At firstminute, Camilla sits on the board of Agile Analog, Nabla, Airly, Mediflash and Typology. Previously, she was an Equity Research Analyst at Berenberg Bank in the ecommerce and retail team in London where she also participated in the IPO of Boozt, a Swedish fashion ecommerce. Prior to that she lived in Buenos Aires working at the OLX headquarters (the largest classifieds marketplace in emerging markets) where she led the CRM project for Latin America. She is a cum laude graduate from Columbia University where she studied History and Political Science.

Link to Sir Hossein Yassaie LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
Mina Samaan, board observer

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse varius enim in eros elementum tristique. Duis cursus, mi quis viverra ornare, eros dolor interdum nulla, ut commodo diam libero vitae erat.

Mina is a Principal at MMC Ventures where he leads on their deep tech early stage investments. He has led a number of investments including Red Sift, Senseon and SLAMcore. Mina has a First-Class Honours in MEng Aeronautical Engineering from Imperial College London and previously worked as an aerodynamics engineer for Williams Formula 1 team.

Link to Sir Hossein Yassaie LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
INVESTORS
Meet our Investors

Firstminute Capital

Firstminute Capitol

Firstminute Capital is a $100m pan-European seed fund founded by Brent Hoberman and Spencer Crawley that launched in June 2017 to support the next wave of early stage European technology entrepreneurs.

The fund, which counts the London-based venture fund Atomico, the Chinese technology giant Tencent and the European FMCG conglomerate Henkel as institutional investors, along with 30 founders of billion dollar technology businesses, invests across Europe, and opportunistically in the US and Israel. Firstminute capital has a sector agnostic remit within tech, with a particular interest in SaaS, DeepTech, vertical AI, Healthtech, Blockchain, Cyber, Gaming and D2C.

learn more

MMC Ventures

MMC Ventures

MMC Ventures is a research-led venture capital firm that has backed over 60 early-stage, high-growth technology companies since 2000.  MMC’s dedicated research function provides the Firm with a deep and differentiated understanding of emerging technologies and sector dynamics, to identify attractive investment opportunities. MMC’s research team also supports early stage companies through the life of MMC’s investment.  

MMC helps to catalyse the growth of enterprise software and consumer internet companies that have the potential to disrupt large markets. The Firm has one of the largest software-as-a-service (SaaS) portfolios in Europe, with recent exits including CloudSense, Invenias and NewVoiceMedia.  MMC’s dynamic consumer portfolio includes several of the UK’s favourite companies, including Bloom & Wild, Gousto and Interactive Investor.

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OMERS Ventures

MMC Ventures

Founded in 1962, OMERS is one of Canada’s largest defined benefit pension plans, with CAD$105 billion in net assets as at December 31, 2020.  OMERS Ventures is an early-stage investor focused on supporting founders and teams who are transforming markets.

Current and past investments across North America and Europe include DuckDuckGo, Deliverect, Hootsuite, Shopify, Ultimate.ai, Wefox and Xanadu.  OMERS Ventures manages CAD$2 billion and has made more than 50 investments in disruptive technology companies across North America and Europe.

learn more
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