About Us.

Agile Analog, creators of a better way to buy analog IP.

Until now, buyers of analog IP have had to settle for the least bad option from a limited portfolio of standard IP products.

Agile Analog is the company behind a new approach: to give the designers of ASICs and SoCs the analog IP that they really want. And to enable this new approach, we developed the unique Composa™ methodology for the generation of customer-specified IP fresh for every new chip design.

Every analog circuit is different

In the digital domain, standard IP can be made to implement fixed functions and to perform as specified in any application. And digital IP readily scales from one node to another. 

But standard analog IP is far less useful to chip designers than standard digital IP is, because of the fundamental characteristics of analog systems. In a sensor, for instance, the requirements in relation to parameters such as sensitivity, accuracy, precision, linearity, and stability over temperature differ from application to application. And the behaviour of analog circuits varies substantially from one process and node to another. An IP which is perfect for one application when fabricated in one foundry on one process and node.

So an analog IP supplier could claim to supply, for instance, an ADC as a standard IP ‘product’, but in reality, every single customer wants IP which is unique to them. A design services consultancy can supply hand-crafted, custom IP, but the process of creating custom IP is slow and very expensive.

ASIC and SoC designers clearly need another approach. That’s what Agile Analog provides. 

A team with IP heritage

Agile Analog is the creation of a team of analog engineers, chip designers and semiconductor industry executives who draw on decades of experience in the semiconductor IP industry. There, they played important roles in developing a successful market for digital IP. 

The analog IP market today is far smaller and less developed. Yet chip manufacturers and designers continually strive to shorten design cycles and integrate ever more functions on-chip – factors which should create surging demand for more analog IP. 

But the market has been failing its customers, because there is too little IP available, and the IP is in a standard, off-the-shelf format. Agile Analog set out to find a way to generate application-specific IP, but without the cost and delay associated with hand-crafted custom IP. Its solution is the Composa™ methodology platform. 

Solving the design automation conundrum

With its Composa™ methodology, Agile Analog has solved the problem of automating the design of analog circuitry – an achievement which had eluded the semiconductor industry for decades. 

Composa™ is a platform methodology for generating unique IP variants on the basis of standard platforms in functional domains such as signal conditioning, data conversion, power regulation and sensing. The Composa™ methodology draws on breakthroughs in design automation, design simulation and the application of artificial intelligence. 

Compatible with the process development kits of all the world’s important CMOS foundries, the Composa™ methodology provides a proven, verified platform for the generation of unique IP on the basis of a broad array of functional specifications, design constraints and optimisation options selected by each customer and for each new design. 

So now with Agile Analog, ASIC and SoC designers can specify and buy analog IP the way they want it. 

Leadership Team

Pete Hutton
Executive Chairman
Biography
Barry Paterson
CEO

Biography
Mike Hulse
CTO
Biography
Barnaby Rix
CFO
Biography
Robert McCubbin
VP Engineering

Biography
Nicky Wilkinson
Senior Director IP Products

Biography

Board of Directors

Mark Redford
Non-Executive Director
Biography
Jonathan Hay
Non-Executive Director
Biography
Sir Hossein Yassaie
Non-Executive Director

Biography
Henry Gladwyn
Non-Executive Director

Biography
Camilla Mazzolini
Board Observer

Biography
Mina Samaan
Board Observer

Biography
Arrow animation button for slide navigationArrow animation button for slide navigationArrow animation button for slide navigation
MIKE HULSE, CTO

Mike has worked in the semiconductor industry for 30 years in a broad range of technical, entrepreneurial, managerial and advisory roles, covering both digital and mixed signal, design methodology, technical leadership and project management.

Link to Mark Mike Hulse's LinkedIn profile
Barnaby Rix, cfo

Barnaby joined from Arm where he was VP Finance for the Product Groups, running the planning function, managing a P&L of $1.6bn, and a team of 70 people. Prior to this, his roles included VP Treasury at Arm, and as an auditor at Deloitte and at Andersen.

Link to Barnaby Rix's LinkedIn profile
pete hutton, chairman

Pete has held several senior positions within the industry, most recently as President of Product Groups at Arm, which involved P&L ownership of all product development, marketing and licensing. Prior to this, his roles included running corporate engineering for Wolfson, General Manager for Processors at ARC, and Group Director for Cadence.

Link to Pete Hutton's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
mark redford, non-executive director

Mark has held roles as VP Emerging Technologies at Arm, GM of North American Operations and VP of Advanced Technology at CSR, and BOD positions at GSS, Surecore and Spin Memory. Alongside his role at Agile Analog, he is currently an advisor to several companies in AI/ML, High Reliability and Solar Energy fields. Mark holds a PhD in Engineering and an Honours Degree in Electronics from the Universities of Edinburgh and Dundee, Scotland respectively.

Link to Mark Redford's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
jonathan hay, non-executive director

Jonathan is a Partner at Delin Ventures where he is responsible for investments into early-stage technology and life sciences businesses and funds.  In addition to Agile Analog, he has led Delin’s investments in Fluidic Analytics, Turbine and Ori Biotech.  Jonathan holds a PhD in mathematics from the Steklov Mathematical Institute, a JD from Harvard Law School, MA from Oxford University and BA from Williams College.

Link to Jonathan Hay's LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 
sir hossein yassaie, non-executive director

A well-recognised figure in the technology world, Sir Hossein Yassaie is also an entrepreneur with a strong belief in technological innovation and disruptions that can solve real problems, disrupt markets and improve everyday life. During his career, Sir Hossein Yassaie has made several contributions that led to industry-changing advances in key technologies including digital TV and radio, PC and games consoles, automotive, computing and, most notably, mobile devices and smartphones. He was founder and CEO of Imagination Technologies Plc until 2016, where he created a semiconductor IP business powering billions of devices. He was also behind the iconic consumer brand Pure. He now has a number of non-executive roles, chairmanships, directorships and investments in numerous disruptive global tech companies.

Link to Sir Hossein Yassaie LinkedIn profile

#One

Analog IP that works the way you
want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Two

Analog IP that is optimized for your
application.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Three

Analog IP that's optimized for your processes and nodes.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible. 

#Four

Analog IP that integrates the features you want.

With Agile Analog, IP design is in your hands. No longer constrained by the limited choice of standard IP products, chip designers can integrate more analog functions than they ever believed possible.