Composa’s unique approach automatically generates analog IP to exactly meet the customer’s specifications and process technology. It uses tried and tested analog IP circuits that are in the company’s Composa™ library. Effectively, the design-once-and-re-use-many-times model of digital IP now applies to analog IP for the first time. As the analog IP circuits in the Composa™ library have been extensively tested and used in previous designs, and are fully validated every time they are generated, this gives a similar level of reassurance and risk mitigation to the digital IP world’s ‘silicon-proven’.
An additional benefit of this automated approach is that Composa™ can simply regenerate the analog IP solution using the PDK for a customer on a different process technology when needed, for example when switching to a different foundry or shrinking the chip to suit a smaller node. Effectively, the company has created the world’s first, automatically generated, process-agnostic analog IP. This solves the problem of portability of the analog IP cores that have traditionally required re-engineering to suit each different silicon process technology. Doing a process-specific re-spin each time a different foundry is used consumes valuable engineering effort that could be better focussed on value-added differentiating design work. When customers integrate Agile Analog’s analog IP cores in their designs, the company can automatically generate new versions of the IP using the PDK for a different process to take advantage of available capacity.
The capability to enable access to any process technology also helps customers when moving to the next generation of a product family that is typically on a smaller process node. The majority of enhancements usually occur in the digital implementation while the analog IP that provides foundation analog functionality, data conversion and power conversion typically remains constant. Maintaining the analog IP performance and features while having it regenerated by Agile Analog for a smaller process node allows customers to focus their valuable analog design engineers on innovative and differentiating design work rather than having to process port all analog circuits.
The last benefit to customers is that Composa™ provides an easy way to integrate analog functions onto the chip that previously required discrete analog components. This reduces complexity, overall motherboard size, the BOM and risk.
All the major foundries are supported including TSMC, GlobalFoundries, Samsung Foundry and SMIC as well as other IC foundries and manufacturers.
