Composa Methodology.

A configurable, multi-process analog IP platform (Composa™)

‍Agile Analog's Composa™ is a methodology for generating IP you want:
With standard analog IP products, you build your chip design around the IP available to you. It means your design is compromised, and you waste time implementing work-arounds and fixing problems created by the IP.
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With Composa™ methodology, Agile Analog build the IP around your chip design.
It generates IP which includes the features you need, optimised to suit your application, and compatible with your choice of foundry process. And it meets your time-to-market requirements: a typical customer goes from final IP specification to fab-ready IP in as little as four weeks.

Composa Methedology foundry process diagram

Open your mind to new design possibilities.

IP design specialists.

With Agile Analog IP, you choose the features and specifications of the IP that we generate for you.
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When you ask a standard analog IP supplier, ‘What IP have you got?’, they will show you a catalogue of IP products. Take it or leave it.

When you approach Agile Analog, we ask, ‘What IP do you want?’

Open your mind to new design possibilities.

Make your own optimisation choices.

Specify IP to fit your application.

Agile Analog’s Composa™ methodology generates IP automatically according to the specifications and choices that you make for your application.

With standard analog IP, you get what you are given. With Agile Analog, it’s up to you.

You can optimise for speed, power, die area, sensitivity, precision, stability or any other parameter. The choice is yours.

Make your own optimisation choices.

Trust the IP you buy.

Fully tested, verified and documented, for easy integration.

Because Agile Analog’s Composa™ methodology generates IP automatically, its outputs are verified and defect-free, unlike IP created by time-challenged and all too human engineers.

The Composa™ methodology is qualified by most of the world’s major foundries, and embeds the process development kits that they supply.

The IP is backed by the industry’s most comprehensive and rigorous set of test specifications, documentation, simulation outputs and verification models. So when you tape out your chip, one element that you will not have to worry about is the Agile Analog IP inside.

Trust the IP you buy.

Enjoy total design flexibility.

When your design changes, so can your analog IP.

Agile Analog uses advanced design automation and applies artificial intelligence to create optimised IP from millions of IP ‘objects’. Once you have specified the IP you need, the process for generating, simulating, testing and verifying it is quick – typically it takes just four weeks.

So if your design parameters change, your Agile Analog IP can easily change as well. A change as substantial as a new process or node, or even a change of foundry, can easily be accommodated mid-design.

This means you enjoy design flexibility, and the comfort of knowing that when your chip design changes, your IP will change to fit it.

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Composa Methodology.

A configurable, multi-process analog IP platform (Composa™)

Open your mind to new design possibilities.

IP design specialists.

Open your mind to new design possibilities.

Make your own optimisation choices.

Specify IP to fit your application.

Make your own optimisation choices.

Trust the IP you buy.

Fully tested, verified and documented, for easy integration.

Trust the IP you buy.

Enjoy total design flexibility.

When your design changes, so can your analog IP.

Enjoy total design flexibility.

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